A memory access device is provided in an image processing apparatus. When the image processing apparatus performs image processing, the memory access device reads data from a SDRAM (Synchronous Dynamic Random Access Memory) in which image frames are stored. In the case of accessing to image data of the SDRAM in the image processing apparatus, a rectangular area is generally accessed. The rectangular area is set with starting point coordinates and end point coordinates, or set with starting point coordinates and the size (number of pixels) of the rectangular area in a horizontal direction and a vertical direction.
A description is hereinafter given of a conventional method for accessing to the SDRAM by the memory access device. Conventionally, 8 bits/pixel image processing was mainly performed. If burst access to the SDRAM is performed on the basis of 8 words/burst, and two SDRAMs with 16 bits/word are used at the time of the image processing, the number of pixels accessed in one burst access is 32 pixels according to the following calculation.16 bits/word×8 words/burst×2 SDRAMs=256 bits/burst256 bits/burst divided by 8 bits/pixel=32 pixels/burstA rectangular area accessed in this one burst is defined as a cell. In this case, the cell is a rectangular area having 32 pixels. One example of the 32-pixel cell is a cell of 8×4 pixels (8 horizontal pixels×4 vertical pixels).
When the 8×4-pixel cell is used, 240 horizontal cells and 270 vertical cells are mapped on an image frame of 1920×1080 pixels for a general HD (High Definition) image.
When a pixel address of an HD image is defined as Pix(x, y), “x” is in the range of 0 to 1919 while “y” is in the range of 0 to 1079, and the respective variables can be expressed with 11 bits each. When the address of the cells assigned to an HD image is defined as Cell(x, y), “x” is in the range of 0 to 239 while “y” is in the range of 0 to 269, and “x” can be expressed with 8 bits while “y” can be expressed with 9 bits. FIG. 23 is a view showing the pixel address and the cell address in an HD image in the background art in the case of 8 bits/pixel.
In an address PixC(x, y) of pixels in each cell, x=0 to 7, y=0 to 3, and “x” can be expressed with 3 bits while “y” can be expressed with 2 bits. FIG. 24 is a view showing the pixel address in each cell in the background art in the case of 8 bits/pixel.
Variables “x” and “y” in Pix(x, y) are expressed as binary numbers in order from LSB (Least Significant Bit) to MSB (Most Significant Bit) as shown below:x=(X0,X1, . . . ,X10)y=(Y0,Y1, . . . ,Y10)Variables “x” and “y” in Cell(x, y) are similarly expressed as shown below:x=(XC0,XC1, . . . ,XC7)y=(YC0,YC1, . . . ,YC8)Variables “x” and “y” in PixC(x, y) are similarly expressed as shown below:x=(XP0,XP1,XP2)y=(YP0,YP1)
Variables “x” and “y” in Pix(x, y) are expressed by Cell(x, y) and PixC(x, y) as shown below:
                              x          =                    ⁢                      (                                          X                ⁢                                                                  ⁢                0                            ,                              X                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              X                ⁢                                                                  ⁢                10                                      )                                                        =                    ⁢                      (                                          XP                ⁢                                                                  ⁢                0                            ,                              XP                ⁢                                                                  ⁢                1                            ,                              XP                ⁢                                                                  ⁢                2                            ,                              XC                ⁢                                                                  ⁢                0                            ,                              XC                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              XC                ⁢                                                                  ⁢                7                                      )                                                            y          =                    ⁢                      (                                          Y                ⁢                                                                  ⁢                0                            ,                              Y                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              Y                ⁢                                                                  ⁢                10                                      )                                                        =                    ⁢                      (                                          YP                ⁢                                                                  ⁢                0                            ,                              YP                ⁢                                                                  ⁢                1                            ,                              YC                ⁢                                                                  ⁢                0                            ,                              YC                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              YC                ⁢                                                                  ⁢                8                                      )                              
For example, variables “x” and “y” in Pix(15, 9) are expressed as binary numbers in order from LSB to MSB as shown below:x=(1,1,1,1,0,0,0,0,0,0,0)y=(1,0,0,1,0,0,0,0,0,0,0)When these values are applied to the above-stated formula, the followings are obtained:(XP0,XP1,XP2)=(1,1,1)(XC0,XC1,XC7)=(1,0,0,0,0,0,0,0)(YP0,YP1)=(1,0)(YC0,YC1,YC8)=(0,1,0,0,0,0,0,0,0)
Therefore, Cell(x, y) and PixC(x, y) are as shown below:Cell(x,y)=Cell(1,2)PixC(x,y)=PixC(7,1)
The number of horizontal pixels and the number of vertical pixels in one cell are powers of 2. Accordingly, in the case of 8 bits/pixel image processing, hence a cell address Cell(x, y) of the SDRAM can be obtained only with upper bits (a part of bits taken out in order from the MSB) of the pixel address Pix(x, y). Therefore, access control of the SDRAM can easily be performed.
When adjacent cells have an identical bank address and their row address is changed during continuous burst access, it is necessary to temporarily stop the access to change the row address. Accordingly, continuous burst access is interrupted and additional time is needed for changing the row address. On the contrary, when adjacent cells have different bank addresses, cells in one bank can be accessed while the row address in other bank is set up, so that continuous burst access can be implemented. Therefore, in order to perform continuous burst access to rectangular areas in the SDRAM, it is necessary to so set that adjacent cells have different bank addresses in both the horizontal direction and the vertical direction.
In the case of an SDRAM with 16-bit width and 1-Gbit DDR3 (Double-Data-Rate3), a column address CA, a row address RA, and a bank address BA are as shown below:CA=(CA0,CA1, . . . ,CA9)RA=(RA0,RA1, . . . ,RA12)BA=(BA0,BA1,BA2)
Of these, lower 3-bit column addresses CA0 to CA2 are 8-word identification addresses for burst access, and therefore in the burst access, they are meaningless (set to 000), and are not used in address allocation. Accordingly, by allocating 23 bits except CA0 to CA2 as the cell address as shown in FIG. 25, continuous burst access can be performed. FIG. 25 is a view showing allocation of the SDRAM address to the cell address in the background art in the case of 8 bits/pixel.
In FIG. 25, the bank address of 2 bits is allocated to lower 2 bits XC cell address, and the bank address of 1 bit is allocated to a lower 1 bit YC cell address. In this allocation, continuous burst access to rectangular areas is performed in such a way that the cells in the horizontal direction are first subjected to continuous burst access, and then the direction of the cells are changed to the vertical direction so that the vertical cells are subjected to continuous access. When the cells in the vertical direction are first subjected to continuous burst access, the bank address of 1 bit is allocated to the LSB of XC addresses, and the bank address of 2 bits is allocated to lower 2 bit YC addresses.
Variables “x” and “y” in Pix(x, y) are expressed with a pixel address in a cell, a bank address, a column address, and a row address as shown below:
                              x          =                    ⁢                      (                                          X                ⁢                                                                  ⁢                0                            ,                              X                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              X                ⁢                                                                  ⁢                10                                      )                                                        =                    ⁢                      (                                          XP                ⁢                                                                  ⁢                0                            ,                              XP                ⁢                                                                  ⁢                1                            ,                              XP                ⁢                                                                  ⁢                2                            ,                              XC                ⁢                                                                  ⁢                0                            ,                              XC                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              XC                ⁢                                                                  ⁢                7                                      )                                                        =                    ⁢                      (                                          XP                ⁢                                                                  ⁢                0                            ,                              XP                ⁢                                                                  ⁢                1                            ,                              XP                ⁢                                                                  ⁢                2                            ,                              BA                ⁢                                                                  ⁢                0                            ,                              BA                ⁢                                                                  ⁢                1                            ,                              CA                ⁢                                                                  ⁢                3                            ,                              CA                ⁢                                                                  ⁢                4                            ,              …              ⁢                                                          ,                              CA                ⁢                                                                  ⁢                8                                      )                                                            y          =                    ⁢                      (                                          Y                ⁢                                                                  ⁢                0                            ,                              Y                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              Y                ⁢                                                                  ⁢                10                                      )                                                        =                    ⁢                      (                                          YP                ⁢                                                                  ⁢                0                            ,                              YP                ⁢                                                                  ⁢                1                            ,                              YC                ⁢                                                                  ⁢                0                            ,                              YC                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              YC                ⁢                                                                  ⁢                8                                      )                                                        =                    ⁢                      (                                          YP                ⁢                                                                  ⁢                0                            ,                              YP                ⁢                                                                  ⁢                1                            ,                              BA                ⁢                                                                  ⁢                2                            ,                              RA                ⁢                                                                  ⁢                0                            ,                              RA                ⁢                                                                  ⁢                1                            ,              …              ⁢                                                          ,                              RA                ⁢                                                                  ⁢                7                                      )                              
When data of a part of an image frame, that is, a rectangular area (block) of 16×16 pixels or 8×8 pixels, is read from a memory in order to perform image processing on the area, using the above access method makes it possible to easily obtain which cell to access using the upper bits of the pixel address. Moreover, address allocation of the bank address, the column address, and the row address with use of the cell address allows for implementation of continuous burst access.
In recent years, there are growing needs for 10 bits/pixel image processing that is higher in quality than conventional 8 bits/pixel image processing. Furthermore, 12 bits/pixel image processing is also being studied. For example, a technology has been proposed in which 10 bits/pixel data is compressed to 8 bits/pixel data and stored in a memory, and at the time of image processing, the compressed data is expanded to 10 bits/pixel data (see, for example, Patent Literature 1). With use of this technology, pixel data whose number of bits per pixel is not equal to a power of 2, such as 10 bits/pixel data, can be processed with apparatuses similar to those for 8 bits/pixel image processing.